URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [sim/] - Rev 159

Rev	Log message	Author	Age	Path
159	initial inport.	simont	7674d 07h	/8051/trunk/sim/
154	File name fixed.	simont	7675d 02h	/8051/trunk/sim/
106	generic_dpram used	simont	7738d 02h	/8051/trunk/sim/
101	initial inport	simont	7738d 07h	/8051/trunk/sim/
100	use \	simont	7738d 07h	/8051/trunk/sim/
99	change directory structure	simont	7738d 07h	/8051/trunk/sim/
98	move to rtl/verilog	simont	7738d 07h	/8051/trunk/sim/
85	prepare bugs	simont	7809d 05h	/8051/trunk/sim/
83	replace some modules	simont	7817d 04h	/8051/trunk/sim/
82	replace some modules	simont	7817d 04h	/8051/trunk/sim/
69	add parameters	simont	7898d 05h	/8051/trunk/sim/
66	added xrom_test	simont	7899d 02h	/8051/trunk/sim/
65	add oc8051_icache and oc8051_cache_ram	simont	7899d 02h	/8051/trunk/sim/
64	signal es_int=1'b0	simont	7899d 02h	/8051/trunk/sim/
63	initial import	simont	7899d 02h	/8051/trunk/sim/
58	add external rom testing	simont	7905d 00h	/8051/trunk/sim/
57	add module oc8051_xrom	simont	7905d 00h	/8051/trunk/sim/
56	initial CVS input	simont	7905d 00h	/8051/trunk/sim/
55	added parameter DELAY	simont	7905d 00h	/8051/trunk/sim/
46	prepared header	simont	7922d 01h	/8051/trunk/sim/