URL https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk

Subversion Repositories adv_debug_sys

[/] [adv_debug_sys/] [trunk/] [Hardware/] - Rev 42

Rev	Log message	Author	Age	Path
42	Added (experimental) Actel UJTAG TAP core. Added JTAG serial port feature to debug hardware core and JTAG bridge program. Added more speedups for USB JTAG cables to bridge program - USB-Blaster users should now see ~30k/sec upload speeds. Updated documentation.	nyawn	5193d 02h	/adv_debug_sys/trunk/Hardware/
34	Restored changes accidentally backed out by previous commit. Removed CVS logs.	nyawn	5264d 21h	/adv_debug_sys/trunk/Hardware/
32	Added a hi-speed mode via a change in protocol in the adv_dbg_if core. This should provide an order-of-magnitude speed improvement for some USB JTAG cables. Updated adv_jtag_bridge to match. Updated adv_dbg_if testbenches. Updated documents to reflect the new hi-speed mode. Added alternate USB-Blaster driver based on libftdi, donated by Xianfeng Zeng. Various bugfixes.	nyawn	5265d 18h	/adv_debug_sys/trunk/Hardware/
30	Fix copy/paste error in copyright header: replaced verilog-style comments with VHDL comments.	nyawn	5377d 22h	/adv_debug_sys/trunk/Hardware/
14	Added support for the legacy hardware debug unit (debug_if) to adv_jtag_bridge. Re-factored adv_jtag_bridge, removed many compilation warnings. Renamed some signals in the TAP cores for clarity. Updated documents.	nyawn	5480d 19h	/adv_debug_sys/trunk/Hardware/
8	Moved sub-modules to the correct subdirectories.	nyawn	5509d 18h	/adv_debug_sys/trunk/Hardware/
6		nyawn	5509d 19h	/adv_debug_sys/trunk/Hardware/