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[/] [axi4_tlm_bfm/] - Rev 36

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Rev Log message Author Age Path
36 Added missing pkg-types.vhdl file for simulation. daniel.kho 3766d 02h /axi4_tlm_bfm/
35 More fixes to Windows script. daniel.kho 3771d 12h /axi4_tlm_bfm/
34 Added double-quotes for Windows script. daniel.kho 3771d 12h /axi4_tlm_bfm/
33 Removed semicolons for Windows script. daniel.kho 3771d 12h /axi4_tlm_bfm/
32 Added compile+simulate script for Windows. daniel.kho 3771d 12h /axi4_tlm_bfm/
31 Added initial Xilinx Vivado synthesis scripts and constraints. daniel.kho 3785d 10h /axi4_tlm_bfm/
30 Refactored synthesis scripts. daniel.kho 3785d 10h /axi4_tlm_bfm/
29 Updated simulation scripts. daniel.kho 3785d 11h /axi4_tlm_bfm/
28 Temporarily remove simulation folder. daniel.kho 3785d 11h /axi4_tlm_bfm/
27 Updated simulation scripts. daniel.kho 3785d 11h /axi4_tlm_bfm/
26 Refactored simulation folders. daniel.kho 3785d 11h /axi4_tlm_bfm/
25 Refactored folders. daniel.kho 3785d 12h /axi4_tlm_bfm/
24 Updated simulation sources to reflect changes made for synthesis. daniel.kho 3785d 12h /axi4_tlm_bfm/
23 Added top-level user example used in technical paper. daniel.kho 3793d 06h /axi4_tlm_bfm/
22 Added pin assignments for BeMicro kit. Added demo top-level used in technical paper. daniel.kho 3793d 06h /axi4_tlm_bfm/
21 Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version. daniel.kho 3796d 08h /axi4_tlm_bfm/
20 Updated simulation scripts. daniel.kho 3796d 08h /axi4_tlm_bfm/
19 Updated synthesis constraints and scripts. daniel.kho 3796d 08h /axi4_tlm_bfm/
18 Added hardware PRBS generator, modularised top-level by having separate file as the tester. daniel.kho 3796d 08h /axi4_tlm_bfm/
17 Added more pipelining, enhancements. Tested on BeMicro kit. daniel.kho 3796d 08h /axi4_tlm_bfm/

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