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[/] [axi4_tlm_bfm/] [trunk/] - Rev 33

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Rev Log message Author Age Path
33 Removed semicolons for Windows script. daniel.kho 3751d 20h /axi4_tlm_bfm/trunk/
32 Added compile+simulate script for Windows. daniel.kho 3751d 20h /axi4_tlm_bfm/trunk/
31 Added initial Xilinx Vivado synthesis scripts and constraints. daniel.kho 3765d 18h /axi4_tlm_bfm/trunk/
30 Refactored synthesis scripts. daniel.kho 3765d 18h /axi4_tlm_bfm/trunk/
29 Updated simulation scripts. daniel.kho 3765d 18h /axi4_tlm_bfm/trunk/
28 Temporarily remove simulation folder. daniel.kho 3765d 18h /axi4_tlm_bfm/trunk/
27 Updated simulation scripts. daniel.kho 3765d 18h /axi4_tlm_bfm/trunk/
26 Refactored simulation folders. daniel.kho 3765d 19h /axi4_tlm_bfm/trunk/
25 Refactored folders. daniel.kho 3765d 19h /axi4_tlm_bfm/trunk/
24 Updated simulation sources to reflect changes made for synthesis. daniel.kho 3765d 19h /axi4_tlm_bfm/trunk/
23 Added top-level user example used in technical paper. daniel.kho 3773d 13h /axi4_tlm_bfm/trunk/
22 Added pin assignments for BeMicro kit. Added demo top-level used in technical paper. daniel.kho 3773d 13h /axi4_tlm_bfm/trunk/
21 Added synthesis files for Vivado. The RTL have not yet been updated with the latest changes available in the Quartus version. daniel.kho 3776d 15h /axi4_tlm_bfm/trunk/
20 Updated simulation scripts. daniel.kho 3776d 16h /axi4_tlm_bfm/trunk/
19 Updated synthesis constraints and scripts. daniel.kho 3776d 16h /axi4_tlm_bfm/trunk/
18 Added hardware PRBS generator, modularised top-level by having separate file as the tester. daniel.kho 3776d 16h /axi4_tlm_bfm/trunk/
17 Added more pipelining, enhancements. Tested on BeMicro kit. daniel.kho 3776d 16h /axi4_tlm_bfm/trunk/
16 Moved transaction counter from BFM to user. This gives the user more control over the number of transactions. The BFM now treats this as an input. daniel.kho 3879d 12h /axi4_tlm_bfm/trunk/
15 [minor]: cleaned up sources. daniel.kho 3881d 19h /axi4_tlm_bfm/trunk/
14 Added simple reset logic and verified on hardware. Added PLL to supply test clock to SignalTap. daniel.kho 3890d 09h /axi4_tlm_bfm/trunk/

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