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[/] [cpu6502_true_cycle/] [trunk/] - Rev 26

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Rev Log message Author Age Path
26 v1.4 PRODUCTION fpga_is_funny 2094d 23h /cpu6502_true_cycle/trunk/
25 fpga_is_funny 2096d 10h /cpu6502_true_cycle/trunk/
24 Bug fix for wrong interrupt sequences in IRQ and NMI. Tested by
simulation with RTI and in a real environment by customer.
Removed directory ./verilog_TRIAL from source.		 fpga_is_funny 5200d 23h /cpu6502_true_cycle/trunk/
22 fpga_is_funny 5200d 23h /cpu6502_true_cycle/trunk/
18 New directory structure. root 5572d 00h /cpu6502_true_cycle/trunk/
17 CORRECTED "RTI" (wrong: use of stack pointer)
RENAME all states of "FSM Execution Unit" for better reading
(90%) Finish working for Specification of cpu6502_tc		 fpga_is_funny 5584d 02h /trunk/
16 CORRECTED "RTI" (wrong: use of stack pointer)
RENAME all states of "FSM Execution Unit" for better reading
(90%) Finish working for Specification of cpu6502_tc		 fpga_is_funny 5584d 02h /trunk/
15 CORRECTED "RTI" (wrong: use of stack pointer)
RENAME all states of "FSM Execution Unit" for better reading
(90%) Finish working for Specification of cpu6502_tc		 fpga_is_funny 5584d 02h /trunk/
14 More optimizations...
- Second Phaze of removing unused nets & registers
- Added Verilog source on demand by some customers (for trial use)		 fpga_is_funny 5631d 00h /trunk/
13 DELETED directory cpu6502_true_cycle/doc/HTML - use the HTML.RAR file instead fpga_is_funny 5635d 20h /trunk/
12 no message fpga_is_funny 5635d 21h /trunk/
11 *** EMERGENCY BUGFIX ***
- Signal rd_o was corrupted in last version. wr_o and wr_n are not effected.
- OP JMP (indirect) produced a 65C02 like jump. On 6502 a special case exist
when the (indirect) address cross the page boundary (e.g. JMP (02FF) reads
from $02FF and $0200, instead of $02FF and $0300)		 fpga_is_funny 5635d 22h /trunk/
9 This commit was generated by cvs2svn to compensate for changes in r8, which
included commits to RCS files with non-trunk default branches.		 fpga_is_funny 5635d 23h /trunk/
7 This commit was generated by cvs2svn to compensate for changes in r6, which
included commits to RCS files with non-trunk default branches.		 fpga_is_funny 5635d 23h /trunk/
5 Bugfixes for all relationchips with interrupts BRK, IRQ and NMI.
The control for the stack pointer within fsm*s of BRK, IRQ and NMI was incorrect. The stack was allways growing up instead of growing down.
The "B" status flag was never set within BRK.
The relationchip between addresses and data while writing onto the stack was badly misalligned.		 fpga_is_funny 5898d 02h /trunk/
4 Corrected HTML files for documentation (change $log$ to $Log$ in all VHDL files in first release) fpga_is_funny 5906d 23h /trunk/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.		 fpga_is_funny 5907d 00h /trunk/
1 Standard project directories initialized by cvs2svn. 5907d 00h /trunk/

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