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[/] [dbg_interface/] [tags/] [rel_23/] [bench/] - Rev 158

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Rev Log message Author Age Path
158 root 5563d 21h /dbg_interface/tags/rel_23/bench/
148 This commit was manufactured by cvs2svn to create tag 'rel_23'. 7364d 03h /dbg_interface/tags/rel_23/bench/
145 Support for 2 CPUs added. igorm 7368d 04h /dbg_interface/tags/rel_23/bench/
142 Typo fixed. igorm 7368d 08h /dbg_interface/tags/rel_23/bench/
141 data_cnt_lim length changed to reduce number of warnings. igorm 7369d 03h /dbg_interface/tags/rel_23/bench/
140 CRC checking of incoming CRC added to all tasks. igorm 7369d 18h /dbg_interface/tags/rel_23/bench/
139 New release of the debug interface (3rd. release). igorm 7371d 21h /dbg_interface/tags/rel_23/bench/
138 Temp version before changing dbg interface. igorm 7378d 01h /dbg_interface/tags/rel_23/bench/
135 'hz changed to 1'hz because Icarus complains. igorm 7385d 01h /dbg_interface/tags/rel_23/bench/
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.		 mohor 7430d 07h /dbg_interface/tags/rel_23/bench/
124 Display for VATS added. mohor 7435d 03h /dbg_interface/tags/rel_23/bench/
121 Port signals are all set to zero after reset. mohor 7438d 03h /dbg_interface/tags/rel_23/bench/
120 test stall_test added. mohor 7438d 06h /dbg_interface/tags/rel_23/bench/
117 Define name changed. mohor 7440d 03h /dbg_interface/tags/rel_23/bench/
116 Data latching changed when testing WB. mohor 7440d 03h /dbg_interface/tags/rel_23/bench/
115 More debug data added. mohor 7440d 07h /dbg_interface/tags/rel_23/bench/
114 CRC generation iand verification in bench changed. mohor 7440d 08h /dbg_interface/tags/rel_23/bench/
113 IDCODE test improved. mohor 7440d 09h /dbg_interface/tags/rel_23/bench/
112 dbg_tb_defines.v not used. mohor 7441d 04h /dbg_interface/tags/rel_23/bench/
111 Define tap_defines.v added to test bench. mohor 7441d 04h /dbg_interface/tags/rel_23/bench/

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