OpenCores
URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [rel_3/] [rtl/] - Rev 158

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
158 root 5564d 18h /dbg_interface/tags/rel_3/rtl/
58 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7614d 02h /dbg_interface/tags/rel_3/rtl/
57 Multiple cpu support added. simons 7614d 02h /dbg_interface/tags/rel_3/rtl/
53 Trst active high. Inverted on higher layer. mohor 7881d 00h /dbg_interface/tags/rel_3/rtl/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7881d 00h /dbg_interface/tags/rel_3/rtl/
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7908d 11h /dbg_interface/tags/rel_3/rtl/
47 mon_cntl_o signals that controls monitor mux added. mohor 8063d 23h /dbg_interface/tags/rel_3/rtl/
46 Asynchronous reset used instead of synchronous. mohor 8072d 05h /dbg_interface/tags/rel_3/rtl/
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8079d 01h /dbg_interface/tags/rel_3/rtl/
44 Signal names changed to lower case. mohor 8079d 01h /dbg_interface/tags/rel_3/rtl/
43 Intentional error removed. mohor 8084d 01h /dbg_interface/tags/rel_3/rtl/
42 A block for checking possible simulation/synthesis missmatch added. mohor 8084d 03h /dbg_interface/tags/rel_3/rtl/
41 Function changed to logic because of some synthesis warnings. mohor 8092d 00h /dbg_interface/tags/rel_3/rtl/
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8106d 00h /dbg_interface/tags/rel_3/rtl/
39 tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
not named correctly.		 mohor 8107d 01h /dbg_interface/tags/rel_3/rtl/
38 Few outputs for boundary scan chain added. mohor 8120d 00h /dbg_interface/tags/rel_3/rtl/
37 tap_top and dbg_top modules are put into two separate modules. tap_top
contains only tap state machine and related logic. dbg_top contains all
logic necessery for debugging.		 mohor 8120d 04h /dbg_interface/tags/rel_3/rtl/
36 Structure changed. Hooks for jtag chain added. mohor 8123d 23h /dbg_interface/tags/rel_3/rtl/
33 LatchedJTAG_IR used when muxing TDO instead of JTAG_IR. mohor 8154d 02h /dbg_interface/tags/rel_3/rtl/
32 Stupid bug that was entered by previous update fixed. mohor 8155d 01h /dbg_interface/tags/rel_3/rtl/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.