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URL https://opencores.org/ocsvn/eco32/eco32/trunk

Subversion Repositories eco32

[/] [eco32/] - Rev 326

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Rev Log message Author Age Path
326 RAM simulation access times set to realistic values hellwig 3206d 05h /eco32/
325 memory speed measurement for new controller added hellwig 3214d 20h /eco32/
324 README updated hellwig 3214d 21h /eco32/
323 memspeed renamed to memspeed-1 hellwig 3214d 21h /eco32/
322 README updated, Makefile added hellwig 3215d 09h /eco32/
321 README updated hellwig 3215d 09h /eco32/
320 README updated hellwig 3216d 05h /eco32/
319 memory controller 2, FPGA realization hellwig 3216d 10h /eco32/
318 memory controller 1, FPGA realization hellwig 3216d 10h /eco32/
317 README updated hellwig 3217d 01h /eco32/
316 README added hellwig 3217d 04h /eco32/
315 README added hellwig 3217d 04h /eco32/
314 memory controller simulation 2 hellwig 3217d 06h /eco32/
313 memory controller simulation 1 hellwig 3217d 08h /eco32/
312 memory controller simulation 0 hellwig 3217d 09h /eco32/
311 README updated hellwig 3217d 10h /eco32/
310 verilated mc implementation with and without trace hellwig 3218d 06h /eco32/
309 multicycle simulation of ECO32, using Verilator hellwig 3219d 07h /eco32/
308 multicycle design, suitable for being verilated hellwig 3219d 11h /eco32/
307 several tests got duration.dat files hellwig 3220d 00h /eco32/

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