URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [trunk/] [sim/] - Rev 309

Rev	Log message	Author	Age	Path
309	Update file list files for different RAM models with byte select accessing.	tadejm	7480d 21h	/ethmac/trunk/sim/
308	Moved RAM model file path from sim_file_list.lst to this file.	tadejm	7480d 21h	/ethmac/trunk/sim/
299	Artisan RAMs added.	mohor	7587d 21h	/ethmac/trunk/sim/
295	Few minor changes.	tadejm	7594d 20h	/ethmac/trunk/sim/
294	Added path to a file with distributed RAM instances for xilinx.	tadejm	7596d 20h	/ethmac/trunk/sim/
293	initial.	tadejm	7620d 17h	/ethmac/trunk/sim/
292	Corrected mistake.	tadejm	7620d 17h	/ethmac/trunk/sim/
291	initial	tadejm	7620d 19h	/ethmac/trunk/sim/
290	Additional checking for FAILED tests added - for ATS.	tadejm	7620d 20h	/ethmac/trunk/sim/
225	Some minor changes.	tadejm	7893d 18h	/ethmac/trunk/sim/
224	Signals for a wave window in Modelsim.	tadejm	7893d 19h	/ethmac/trunk/sim/
217	Bist supported.	mohor	7900d 20h	/ethmac/trunk/sim/
215	Bist supported.	mohor	7900d 21h	/ethmac/trunk/sim/
208	Virtual Silicon RAMs moved to lib directory	tadej	7918d 14h	/ethmac/trunk/sim/
207	Virtual Silicon RAM support fixed	tadej	7918d 14h	/ethmac/trunk/sim/
206	Virtual Silicon RAM added to the simulation.	mohor	7918d 14h	/ethmac/trunk/sim/
205	ETH_VIRTUAL_SILICON_RAM supported.	mohor	7918d 15h	/ethmac/trunk/sim/
187	_info file added.	mohor	7924d 14h	/ethmac/trunk/sim/
186	Macro for testbench (DO file).	mohor	7924d 14h	/ethmac/trunk/sim/
185	Directory keeper.	mohor	7924d 14h	/ethmac/trunk/sim/