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[/] [heap_sorter/] - Rev 8

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8 Added the HLS implementation of the sorter, described in http://dx.doi.org/10.1117/12.2502093 wzab 2190d 08h /heap_sorter/
7 The simplified version of the sorter, without the Init flag and with Valid
flag used as a part of the sorter key, which simplifies the key comparator
logic.
wzab 2416d 06h /heap_sorter/
6 High-speed version with comparator moved from a function to the
separate VHDL component (with 1 clock period latency).
It allows better utilization of the platform-specific features.
wzab 2425d 12h /heap_sorter/
5 Added new high-speed version capable to work at higher speed, but using 4
clk cycles per data word.
wzab 2426d 02h /heap_sorter/
4 Added file implementing dual port common clock RAM inferrable in synthesis. wzab 4137d 23h /heap_sorter/
3 Eliminated synthesis of latches for a few signals wzab 4138d 00h /heap_sorter/
2 Initial commit of version previously hosted at http://www.ise.pw.edu.pl/~wzab/fpga_heapsort wzab 4399d 06h /heap_sorter/
1 The project and the structure was created root 4400d 23h /heap_sorter/

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