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Rev Log message Author Age Path
350 root 5565d 05h /mlite/trunk/
349 Added help text for bootldr target rhoads 5596d 00h /trunk/
348 Added comment for 32MB and 128MB DDR parts rhoads 5596d 00h /trunk/
347 Xilinx ISE Project file rhoads 5596d 00h /trunk/
346 Support optional 4KB cache rhoads 5633d 00h /trunk/
345 Commented out optional mult speedup rhoads 5636d 20h /trunk/
344 Fixed compiler warning rhoads 5636d 20h /trunk/
343 Initial working cache rhoads 5636d 20h /trunk/
342 Changed simple cache rhoads 5636d 20h /trunk/
341 Permit large file transfers when running on windows rhoads 5636d 21h /trunk/
340 Get the length of a file rhoads 5636d 21h /trunk/
339 Format output of ls rhoads 5636d 21h /trunk/
338 Fix filename problem with 9th file in directory rhoads 5636d 21h /trunk/
337 Initial attempt at a cache rhoads 5642d 01h /trunk/
336 Better support Linux rhoads 5674d 18h /trunk/
335 Use enable signal for byte_we rhoads 5683d 19h /trunk/
334 Short time for averaging read signal for 12.5 MHz case rhoads 5693d 18h /trunk/
333 Updated Altera lpm_ram_dp usage for Cyclone FPGAs rhoads 5693d 18h /trunk/
332 Updated Altera lpm_ram_dp rhoads 5693d 18h /trunk/
331 Commented out unconnected signals rhoads 5754d 19h /trunk/

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