URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] - Rev 24

Rev	Log message	Author	Age	Path
24	All Instruction C code added	dinesha	2706d 06h	/oms8051mini/trunk/verif/
23	c code removed	dinesha	2706d 06h	/oms8051mini/trunk/verif/
22	New C Model added	dinesha	2706d 06h	/oms8051mini/trunk/verif/
21	New test case	dinesha	2706d 09h	/oms8051mini/trunk/verif/
19	Uart Message Handler added as register master	dinesha	2719d 11h	/oms8051mini/trunk/verif/
16	.dat file is removed from svn	dinesha	2727d 15h	/oms8051mini/trunk/verif/
15	Clean up	dinesha	2727d 15h	/oms8051mini/trunk/verif/
14	Tb Clean up	dinesha	2728d 08h	/oms8051mini/trunk/verif/
11	changed 32 bit to 8 bit register interface	dinesha	2731d 07h	/oms8051mini/trunk/verif/
10	EXTERNAL ROM option is removed	dinesha	2732d 17h	/oms8051mini/trunk/verif/
9	Modelsim golden log file	dinesha	2742d 09h	/oms8051mini/trunk/verif/
8	irun update for cadence flow	dinesha	2742d 09h	/oms8051mini/trunk/verif/
7	Uart test case cleanup	dinesha	2742d 09h	/oms8051mini/trunk/verif/
6	Uart Message Handler added into SVN and Uart fixs	dinesha	2742d 11h	/oms8051mini/trunk/verif/
5	Irun Rename	dinesha	2743d 09h	/oms8051mini/trunk/verif/
4	Irun update	dinesha	2743d 09h	/oms8051mini/trunk/verif/
3	GMAC related test cases are removed	dinesha	2744d 08h	/oms8051mini/trunk/verif/
2	Initial version; 1. Ported from turbo8051 core data base 1. Removed the GMAC related logic and verif componets	dinesha	2744d 08h	/oms8051mini/trunk/verif/