URL https://opencores.org/ocsvn/oms8051mini/oms8051mini/trunk

Subversion Repositories oms8051mini

[/] [oms8051mini/] [trunk/] [verif/] - Rev 33

Rev	Log message	Author	Age	Path
33	Unused test log are deleted	dinesha	2711d 11h	/oms8051mini/trunk/verif/
32	i2c test case added	dinesha	2711d 11h	/oms8051mini/trunk/verif/
31	I2C Master Test cases are added	dinesha	2712d 06h	/oms8051mini/trunk/verif/
30	irun update	dinesha	2712d 09h	/oms8051mini/trunk/verif/
29	i2c master test cased added	dinesha	2712d 09h	/oms8051mini/trunk/verif/
27	I2C master is integrated	dinesha	2713d 08h	/oms8051mini/trunk/verif/
25	8051 core reset active edge changed from high to low	dinesha	2714d 11h	/oms8051mini/trunk/verif/
24	All Instruction C code added	dinesha	2716d 05h	/oms8051mini/trunk/verif/
23	c code removed	dinesha	2716d 05h	/oms8051mini/trunk/verif/
22	New C Model added	dinesha	2716d 05h	/oms8051mini/trunk/verif/
21	New test case	dinesha	2716d 08h	/oms8051mini/trunk/verif/
19	Uart Message Handler added as register master	dinesha	2729d 10h	/oms8051mini/trunk/verif/
16	.dat file is removed from svn	dinesha	2737d 14h	/oms8051mini/trunk/verif/
15	Clean up	dinesha	2737d 14h	/oms8051mini/trunk/verif/
14	Tb Clean up	dinesha	2738d 07h	/oms8051mini/trunk/verif/
11	changed 32 bit to 8 bit register interface	dinesha	2741d 06h	/oms8051mini/trunk/verif/
10	EXTERNAL ROM option is removed	dinesha	2742d 16h	/oms8051mini/trunk/verif/
9	Modelsim golden log file	dinesha	2752d 08h	/oms8051mini/trunk/verif/
8	irun update for cadence flow	dinesha	2752d 08h	/oms8051mini/trunk/verif/
7	Uart test case cleanup	dinesha	2752d 08h	/oms8051mini/trunk/verif/