OpenCores
URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] [open_hitter/] [trunk/] - Rev 10

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
10 split source files to sime and rtl stvhawes 3312d 04h /open_hitter/trunk/
9 highlevel block diagram added stvhawes 3313d 01h /open_hitter/trunk/
8 sim sequence error fixed, so 20% success -> 100% success for unit test on fpga stvhawes 3313d 03h /open_hitter/trunk/
7 split clock/byte_ready and fix logic stvhawes 3317d 20h /open_hitter/trunk/
6 fixing synthesizable stvhawes 3319d 05h /open_hitter/trunk/
5 fixing synthesizable stvhawes 3319d 09h /open_hitter/trunk/
4 developing ideas around unit test / fpga verification stvhawes 3319d 21h /open_hitter/trunk/
3 developing ideas around unit test / fpga verification stvhawes 3319d 21h /open_hitter/trunk/
2 initial sources, wrappers for regression test harness stvhawes 3331d 00h /open_hitter/trunk/
1 The project and the structure was created root 3332d 19h /open_hitter/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.