URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [run/] - Rev 73

Rev	Log message	Author	Age	Path
73	Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh". This will prevent compatibility problems in systems where bash isn't the default shell.	olivier.girard	5051d 09h	/openmsp430/trunk/core/sim/rtl_sim/run/
67	Added 16x16 Hardware Multiplier.	olivier.girard	5200d 16h	/openmsp430/trunk/core/sim/rtl_sim/run/
65	Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1.	olivier.girard	5211d 07h	/openmsp430/trunk/core/sim/rtl_sim/run/
54	Update FPGA projects with the combinatorial loop fixed.	olivier.girard	5239d 10h	/openmsp430/trunk/core/sim/rtl_sim/run/
33	In order to avoid confusion, the following changes have been implemented to the Verilog code: - renamed the "rom_" ports and defines to "pmem_" (program memory). - renamed the "ram_" ports and defines to "dmem_" (data memory). In addition, in order to prevent potential conflicts with the Verilog defines of other IPs, a Verilog undefine file has been created.	olivier.girard	5268d 10h	/openmsp430/trunk/core/sim/rtl_sim/run/
6	Some more SVN ignore properties...	olivier.girard	5437d 08h	/openmsp430/trunk/core/sim/rtl_sim/run/
2	Upload complete openMSP430 project to the SVN repository	olivier.girard	5450d 07h	/openmsp430/trunk/core/sim/rtl_sim/run/