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Rev Log message Author Age Path
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4736d 08h /openrisc/
551 Fixed typo (disble->disable) in cache disable functions. yannv 4738d 04h /openrisc/
550 Turned off verbose output in script. Documented diagnostics in testing. jeremybennett 4738d 05h /openrisc/
549 Clarified meaning of DEJAGNU. jeremybennett 4738d 05h /openrisc/
548 New scripts for testing, documentation of testing, fixes to DejaGnu test scripts and updates to scripts. jeremybennett 4738d 06h /openrisc/
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4740d 07h /openrisc/
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4741d 00h /openrisc/
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4747d 02h /openrisc/
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4747d 09h /openrisc/
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4747d 09h /openrisc/
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.		 julius 4752d 23h /openrisc/
541 uC/OS-II port update - maintain cache settings in SR for new tasks. Thanks to contributor Stefan Kristiansson julius 4755d 04h /openrisc/
540 Ensure the re-entrancy structure is re-initialized on restart. jeremybennett 4756d 01h /openrisc/
539 newlib update - sync exception stack size define between crt0 and or1k-support library julius 4756d 07h /openrisc/
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4763d 04h /openrisc/
537 ORPSoC or1200 fix for l.rfe bug, and when multiply is disabled. julius 4763d 21h /openrisc/
536 ORPSoC - removing duplicate ethmac toplevel file. julius 4767d 10h /openrisc/
535 ORPSoC - adding sw tests for l.rfe julius 4769d 00h /openrisc/
534 Some ABI updates (64-bit values in 32-bit registers, FP optional) yannv 4773d 06h /openrisc/
533 First draft of 2011 review of OR1K architecture specification. yannv 4773d 10h /openrisc/

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