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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] - Rev 626

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Rev Log message Author Age Path
626 Fix to support GCC 4.6 by disabling -Werror. jeremybennett 4675d 17h /openrisc/
625 Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. jeremybennett 4675d 18h /openrisc/
624 add missing delay slot instruction
vPortDisableInterrupts
vPortEnableInterrupts		 filepang 4676d 23h /openrisc/
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition		 filepang 4677d 14h /openrisc/
622 update uart driver for support multiple uart cores
from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart		 filepang 4677d 16h /openrisc/
621 update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source code.

insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will
be returned by xPortEndScheduler().		 filepang 4679d 08h /openrisc/
620 remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.		 jeremybennett 4679d 21h /openrisc/
619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson		 julius 4688d 09h /openrisc/
618 Remove unused parameter Tp olof 4688d 16h /openrisc/
617 Set tx_negedge correctly (Fixes bug #12) olof 4692d 19h /openrisc/
616 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
615 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
614 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
613 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
612 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
611 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
610 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
609 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
608 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/
607 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4693d 17h /openrisc/

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