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Rev Log message Author Age Path
127 New config option to allow l.xori with unsigned operand. jeremybennett 5110d 18h /openrisc/trunk/
126 More explanation of l.xori. jeremybennett 5110d 18h /openrisc/trunk/
125 Update to specification of l.xori. jeremybennett 5111d 01h /openrisc/trunk/
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5111d 13h /openrisc/trunk/
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5111d 17h /openrisc/trunk/
122 Added l.ror and l.rori with associated tests. jeremybennett 5112d 13h /openrisc/trunk/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5112d 14h /openrisc/trunk/
120 Documents exception generation by l.jalr and l.jr jeremybennett 5112d 14h /openrisc/trunk/
119 Updated to clarify exceptions for division and details of multiplication. jeremybennett 5113d 02h /openrisc/trunk/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5113d 11h /openrisc/trunk/
117 Updates on l.ff1, l.fl1 and l.maci. jeremybennett 5115d 14h /openrisc/trunk/
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5115d 14h /openrisc/trunk/
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5116d 14h /openrisc/trunk/
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5116d 15h /openrisc/trunk/
113 Updates to exception handling for l.add and l.div jeremybennett 5117d 14h /openrisc/trunk/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5117d 14h /openrisc/trunk/
111 Changed conditionals for Verilator to "verilator" instead of "VERILATOR". jeremybennett 5117d 18h /openrisc/trunk/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5118d 15h /openrisc/trunk/
109 or_debug_proxy does signals with signals, just ignores signals julius 5118d 23h /openrisc/trunk/
108 Updated to clarify overflow and exceptions for l.add, l.addc, l.addi, l.addic, l.div and l.divu. jeremybennett 5120d 13h /openrisc/trunk/

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