OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] - Rev 679

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
679 Allow setting the boot address as an external
parameter. If no parameter is used, the value
from OR1200_BOOT_ADR will be used

Signed-off-by: Olof Kindgren <olof@opencores.org>
Acked-by: Julius Baxter <juliusbaxter@gmail.com>
olof 4476d 12h /openrisc/trunk/
678 added credits skrzyp 4476d 15h /openrisc/trunk/
677 atlys: add 2-clock synchronizer chain for ddr2_calib_done

The signal ddr2_calib_done signal comes from the ddr2 clock domain,
while wb_req is treating it as if it came from wb_clk domain. As a
result the timing analysis tool assumed a worst case scenario of 5ns
between the two domains and the results were miserable.

While we can argue that this is a multi-cycle path, the fact is that
ddr2_calib_done feeds into multiple logic sinks and can potentially
cause meta-stability issue in the design. The solution is to add a
2-clock meta-stability filter to address both the timing problems and
the meta-stability concern.

Signed-off-by: Jason Zheng <jxzheng@gmail.com>
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Acked-by: Olof Kindgren <olof.kindgren@orsoc.se>
stekern 4484d 14h /openrisc/trunk/
676 Add a libgloss definition file for the new ORSoC OpenRISC development board

Signed-off-by: Olof Kindgren <olof at opencores.org>
acked-by: Yann Vernier <yann.vernier at orsoc.se>
olof 4492d 20h /openrisc/trunk/
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer
filepang 4515d 07h /openrisc/trunk/
674 or1200: Fix for Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled julius 4518d 20h /openrisc/trunk/
673 Multiple 64-bit fixes (mostly sign and size of constants). Fix bug #1. yannv 4551d 16h /openrisc/trunk/
672 ORPSoC: Fix Bug 76 - Incorrect unsigned integer less-than compare with COMP3 option enabled

OR1200 RTL fix and software test added.
julius 4555d 07h /openrisc/trunk/
671 ORPSoC: Fix for Bug 75 - or1200-except and or1200-ticksyscall regression tests failing due to change in memory model julius 4555d 07h /openrisc/trunk/
670 Changing bugurl as we have bugzilla now olof 4555d 11h /openrisc/trunk/
669 FreeRTOSV6.1.1
source cleanup, delete uncecessary code
filepang 4558d 16h /openrisc/trunk/
668 FreeRTOSV6.1.1
add missing 'make clean' in make script
filepang 4559d 07h /openrisc/trunk/
667 Corrected ITLB/DTLB values according to the arch spec.
This partially fixes bug #58
olof 4560d 12h /openrisc/trunk/
666 FreeRTOSV6.1.1
minimal set of standard demo task is working
filepang 4561d 15h /openrisc/trunk/
665 FreeRTOSV6.1.1
fix context save/restore stack size bug
remove unnecessary line
filepang 4561d 15h /openrisc/trunk/
664 FreeRTOSV6.1.1
modify processor abstraction layer.
now,all tasks are running in supervisor mode
filepang 4561d 15h /openrisc/trunk/
663 Fix compatibility problems with GCC 4.6.1. Fix a bug with hardware floating point in GCC. jeremybennett 4565d 10h /openrisc/trunk/
662 minor corrections to clean simulation files paknick 4581d 12h /openrisc/trunk/
661 added makefile for icarus simulation paknick 4581d 12h /openrisc/trunk/
660 updated makefiles for simulation with altera ordb2a-ep4ce22 paknick 4581d 15h /openrisc/trunk/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.