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234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5051d 04h /openrisc/trunk/or1ksim/cache/
233 New softfloat FPU and testfloat sw for or1ksim julius 5051d 15h /openrisc/trunk/or1ksim/cache/
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5052d 20h /openrisc/trunk/or1ksim/cache/
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5054d 20h /openrisc/trunk/or1ksim/cache/
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5055d 04h /openrisc/trunk/or1ksim/cache/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5100d 20h /openrisc/trunk/or1ksim/cache/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5101d 17h /openrisc/trunk/or1ksim/cache/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5120d 22h /openrisc/trunk/or1ksim/cache/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5126d 23h /openrisc/trunk/or1ksim/cache/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5141d 05h /openrisc/trunk/or1ksim/cache/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5142d 07h /openrisc/trunk/or1ksim/cache/
91 Tidy up of some obsolete configuration code. jeremybennett 5154d 20h /openrisc/trunk/or1ksim/cache/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5154d 21h /openrisc/trunk/or1ksim/cache/
83 Fix to use -1 to invalidate cache tags. Suggested by John Alfredo. jeremybennett 5155d 19h /openrisc/trunk/or1ksim/cache/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5155d 20h /openrisc/trunk/or1ksim/cache/
80 Add missing configuration files to SVN. jeremybennett 5156d 00h /openrisc/trunk/or1ksim/cache/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5486d 05h /openrisc/trunk/or1ksim/cache/

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