OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [peripheral/] - Rev 224

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5054d 23h /openrisc/trunk/or1ksim/peripheral/
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5100d 16h /openrisc/trunk/or1ksim/peripheral/
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5101d 13h /openrisc/trunk/or1ksim/peripheral/
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5105d 16h /openrisc/trunk/or1ksim/peripheral/
110 or1ksim make check should work without a libc in the or32-elf tools julius 5106d 17h /openrisc/trunk/or1ksim/peripheral/
104 Candidate release 0.4.0rc4 jeremybennett 5112d 00h /openrisc/trunk/or1ksim/peripheral/
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5120d 18h /openrisc/trunk/or1ksim/peripheral/
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5126d 19h /openrisc/trunk/or1ksim/peripheral/
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5141d 01h /openrisc/trunk/or1ksim/peripheral/
96 Various changes which had not been picked up in earlier commits. jeremybennett 5142d 02h /openrisc/trunk/or1ksim/peripheral/
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5147d 17h /openrisc/trunk/or1ksim/peripheral/
91 Tidy up of some obsolete configuration code. jeremybennett 5154d 16h /openrisc/trunk/or1ksim/peripheral/
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5154d 17h /openrisc/trunk/or1ksim/peripheral/
87 Typo fixed. jeremybennett 5155d 00h /openrisc/trunk/or1ksim/peripheral/
86 Bug 1723 fixed (PS2 keyboard error message clarification). jeremybennett 5155d 00h /openrisc/trunk/or1ksim/peripheral/
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5155d 16h /openrisc/trunk/or1ksim/peripheral/
80 Add missing configuration files to SVN. jeremybennett 5155d 20h /openrisc/trunk/or1ksim/peripheral/
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5273d 18h /openrisc/trunk/or1ksim/peripheral/
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5486d 01h /openrisc/trunk/or1ksim/peripheral/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.