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Rev Log message Author Age Path
10 Ho ho, better circuit homer.xing 4507d 06h /pairing/
9 Add constrains file for ISE homer.xing 4508d 10h /pairing/
8 Finished Tate Pairing. Ha ha ha homer.xing 4508d 11h /pairing/
7 Finish inversion @ f33m homer.xing 4516d 16h /pairing/
6 add testbench for $f33m$. homer.xing 4517d 15h /pairing/
5 rename director : verilog/ -> rtl/ homer.xing 4517d 15h /pairing/
4 add testbench homer.xing 4518d 14h /pairing/
3 finish Duursma Lee algorithm. doing f33m module homer.xing 4518d 14h /pairing/
2 upload code for Duursma-Lee algorithm. I am still developing them. homer.xing 4519d 13h /pairing/
1 The project and the structure was created root 4519d 13h /pairing/

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