URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] [tags/] [1.0.1-release/] - Rev 47

Rev	Log message	Author	Age	Path
30	Changing name tags/1.0.1 to tags/1.0.1-release.	magro732	3571d 15h	/rio/tags/1.0.1-release/
29	Fixed bug in RioSwitch internal Wishbone interconnects.	magro732	3571d 16h	/rio/tags/1.0.1/
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	3571d 16h	/rio/trunk/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	3740d 09h	/rio/trunk/
24	Changing errornous use statement.	magro732	3740d 09h	/rio/trunk/
20	Adding software C-stack and matching VHDL modules.	magro732	3922d 05h	/rio/trunk/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4011d 16h	/rio/trunk/
8	Adding signal descriptions in comments.	magro732	4055d 06h	/rio/trunk/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4142d 10h	/rio/trunk/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4142d 12h	/rio/trunk/
5	Uploading primitive documentation.	magro732	4149d 04h	/rio/trunk/
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4171d 17h	/rio/trunk/
3	Adding RioPacketBuffer and testbench.	magro732	4172d 09h	/rio/trunk/
2	Adding RioSwitch and testbench.	magro732	4172d 11h	/rio/trunk/
1	The project and the structure was created	root	4173d 17h	/rio/trunk/