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URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] [trunk/] - Rev 39

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Rev Log message Author Age Path
28 Correcting bug in RioSwitch.vhd internal Wishbone interconnect.
Modifying an existing test case in TestRioSwitch.vhd to provoke the error.
magro732 3570d 03h /rio/trunk/
25 Correcting compiler errors in TestRioPcsUart.vhd magro732 3738d 19h /rio/trunk/
24 Changing errornous use statement. magro732 3738d 20h /rio/trunk/
20 Adding software C-stack and matching VHDL modules. magro732 3920d 16h /rio/trunk/
9 Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes) azdem 4010d 03h /rio/trunk/
8 Adding signal descriptions in comments. magro732 4053d 16h /rio/trunk/
7 Adding missing generic parameters to RioPacketBuffer. magro732 4140d 20h /rio/trunk/
6 Adding RioWbBridge. Sorry, no testbench for this one. magro732 4140d 22h /rio/trunk/
5 Uploading primitive documentation. magro732 4147d 14h /rio/trunk/
4 Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification. magro732 4170d 04h /rio/trunk/
3 Adding RioPacketBuffer and testbench. magro732 4170d 20h /rio/trunk/
2 Adding RioSwitch and testbench. magro732 4170d 21h /rio/trunk/
1 The project and the structure was created root 4172d 03h /rio/trunk/

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