URL https://opencores.org/ocsvn/rio/rio/trunk

Subversion Repositories rio

[/] [rio/] [trunk/] [rtl/] - Rev 33

Rev	Log message	Author	Age	Path
28	Correcting bug in RioSwitch.vhd internal Wishbone interconnect. Modifying an existing test case in TestRioSwitch.vhd to provoke the error.	magro732	3561d 17h	/rio/trunk/rtl/
25	Correcting compiler errors in TestRioPcsUart.vhd	magro732	3730d 10h	/rio/trunk/rtl/
20	Adding software C-stack and matching VHDL modules.	magro732	3912d 06h	/rio/trunk/rtl/
9	Adding the recently written PCS code, which connects the RioSerial to the Virtex-6 GTX-Quad (4-Lane SerDes)	azdem	4001d 17h	/rio/trunk/rtl/
8	Adding signal descriptions in comments.	magro732	4045d 07h	/rio/trunk/rtl/
7	Adding missing generic parameters to RioPacketBuffer.	magro732	4132d 10h	/rio/trunk/rtl/
6	Adding RioWbBridge. Sorry, no testbench for this one.	magro732	4132d 12h	/rio/trunk/rtl/
4	Adding protocol engine implementing the hardware independent parts of the LP-serial physical specification.	magro732	4161d 18h	/rio/trunk/rtl/
3	Adding RioPacketBuffer and testbench.	magro732	4162d 10h	/rio/trunk/rtl/
2	Adding RioSwitch and testbench.	magro732	4162d 12h	/rio/trunk/rtl/