URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [tools/] [regtool/] - Rev 135

Rev	Log message	Author	Age	Path
135	resynced with socgen, Release V1.0.0 changed tool lic to apache 2.0	jt_eaton	2775d 10h	/socgen/trunk/tools/regtool/
134	Resynced database socgen now supports elaboration Bad news is that it is now alot slower.	jt_eaton	3285d 12h	/socgen/trunk/tools/regtool/
131	Added elaboration databases and tools Added bus map creation tools	jt_eaton	3360d 10h	/socgen/trunk/tools/regtool/
130	Dec 2014 major release trimmed out some IP replaced perl database with Berkeley	jt_eaton	3464d 03h	/socgen/trunk/tools/regtool/
128	major cleanup added toolflows for sim,syn,documentation,linting and verilog added documentation tools	jt_eaton	3919d 09h	/socgen/trunk/tools/regtool/
127	final cleanup before DAC	jt_eaton	4034d 05h	/socgen/trunk/tools/regtool/
125	Added two new 6502 cores in www.6502.org cleaned up sogen xml files and added module name control	jt_eaton	4132d 04h	/socgen/trunk/tools/regtool/
120	clean up componentGenerators names and directories sim + lint now synthesis TestBench	jt_eaton	4246d 08h	/socgen/trunk/tools/regtool/
119	moved copyright files into /verilog changed cde copyright to apache from gplv3 split out tools into separate subdirectories changed design.xml files to socgen: namespace	jt_eaton	4281d 03h	/socgen/trunk/tools/regtool/