URL https://opencores.org/ocsvn/spdif_interface/spdif_interface/trunk

Subversion Repositories spdif_interface

[/] [spdif_interface/] [tags/] [rx_beta_1/] - Rev 73

Rev	Log message	Author	Age	Path
73	New directory structure.	root	5562d 12h	/spdif_interface/tags/rx_beta_1/
43	This commit was manufactured by cvs2svn to create tag 'rx_beta_1'.		7264d 04h	/tags/rx_beta_1/
42	Fixed bug with lock event generation.	gedra	7264d 04h	/trunk/
41	Test bench update.	gedra	7264d 04h	/trunk/
40	Improved test bench.	gedra	7265d 05h	/trunk/
39	Bug-fix.	gedra	7265d 05h	/trunk/
38	Signal renaming and bug fix.	gedra	7279d 05h	/trunk/
37	Converted to numeric_std and fixed a few bugs.	gedra	7280d 07h	/trunk/
36	Top level entity for receiver.	gedra	7280d 07h	/trunk/
35	Top level test bench for receiver. NB! Not complete.	gedra	7280d 07h	/trunk/
34	Converter to numeric_std and added hex functions	gedra	7280d 07h	/trunk/
33	Minor update.	gedra	7280d 07h	/trunk/
32	Wishbone bus utilities.	gedra	7282d 02h	/trunk/
31	Added data output.	gedra	7282d 02h	/trunk/
30	Added Wishbone bus cycle decoder.	gedra	7283d 03h	/trunk/
29	Wishbone bus cycle decoder.	gedra	7283d 03h	/trunk/
28	Delint'ed and changed name of architecture.	gedra	7287d 11h	/trunk/
27	Alternate dual port memory implementation for Altera FPGA's.	gedra	7288d 02h	/trunk/
26	Fixed a few bugs.	gedra	7290d 02h	/trunk/
25	Changed status reg. declaration	gedra	7290d 02h	/trunk/