URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] - Rev 336

Rev	Log message	Author	Age	Path
336	docs	arniml	505d 02h	/t48/
335	simplify up41 test setup	arniml	505d 04h	/t48/
334	fix timing of sel_an*, rad	arniml	505d 16h	/t48/
333	add t8022	arniml	505d 21h	/t48/
332	mcs2x tests	arniml	506d 18h	/t48/
331	release 1.3	arniml	507d 00h	/t48/
330	add t8021	arniml	507d 00h	/t48/
329	start work on t2x	arniml	507d 18h	/t48/
328	prepare 1.3	arniml	509d 20h	/t48/
327	update integration manual	arniml	510d 17h	/t48/
326	refine status_q update	arniml	510d 22h	/t48/
325	experimental upi41_db_bus variant with asynchronous master interface	arniml	511d 04h	/t48/
324	enhance access timing in test bench	arniml	511d 04h	/t48/
323	- prevent change when master reads status - relax master access timing	arniml	512d 03h	/t48/
322	hold db_dir_o during entire access	arniml	513d 19h	/t48/
321	improve compatibility with modelsim and ghdl	arniml	514d 17h	/t48/
320	improve in test	arniml	514d 17h	/t48/
319	- add dma test - update dma logic	arniml	516d 19h	/t48/
318	t8042ah synth, fix warnings	arniml	516d 23h	/t48/
317	implement dma logic	arniml	517d 00h	/t48/