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Rev Log message Author Age Path
338 sample int with rising ALE arniml 518d 11h /t48/
337 t8022 synthesis arniml 518d 12h /t48/
336 docs arniml 518d 14h /t48/
335 simplify up41 test setup arniml 518d 16h /t48/
334 fix timing of sel_an*, rad arniml 519d 04h /t48/
333 add t8022 arniml 519d 09h /t48/
332 mcs2x tests arniml 520d 06h /t48/
331 release 1.3 arniml 520d 12h /t48/
330 add t8021 arniml 520d 12h /t48/
329 start work on t2x arniml 521d 06h /t48/
328 prepare 1.3 arniml 523d 08h /t48/
327 update integration manual arniml 524d 05h /t48/
326 refine status_q update arniml 524d 10h /t48/
325 experimental upi41_db_bus variant with asynchronous master interface arniml 524d 16h /t48/
324 enhance access timing in test bench arniml 524d 16h /t48/
323 - prevent change when master reads status
- relax master access timing		 arniml 525d 15h /t48/
322 hold db_dir_o during entire access arniml 527d 07h /t48/
321 improve compatibility with modelsim and ghdl arniml 528d 05h /t48/
320 improve in test arniml 528d 05h /t48/
319 - add dma test
- update dma logic		 arniml 530d 07h /t48/

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