OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] - Rev 109

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
109 Removed mreq_n from cfgo_driver, disconnected interrupt line ghutchis 4858d 17h /tv80/
108 Added environment parameter to control run time ghutchis 4858d 17h /tv80/
107 Fixed memory contention between config interface and TV80 during write ghutchis 4859d 03h /tv80/
106 Additional environment updates. Added sample source code for
application. Fixed memory overflow bug in load_ihex().
ghutchis 4859d 03h /tv80/
105 Fixed bugs after environment bringup ghutchis 4859d 04h /tv80/
104 Added basic SystemC environment for testing sample app ghutchis 4859d 04h /tv80/
103 Updated RTL syntax errors ghutchis 4859d 10h /tv80/
102 Added environment directory for "localcfg" sample app ghutchis 4859d 12h /tv80/
101 Added sample application for local config processor ghutchis 4859d 16h /tv80/
100 Changed do to dout in tv80n, checked in fix for flags bug ghutchis 4890d 14h /tv80/
99 Fixed setting of flags for LD A, I and LD A, R instructions

Added new testcase ivec_flags to cover new opcodes
ghutchis 4948d 12h /tv80/
98 Changed malloc for strings with constant length copy, add assertion checks for
null pointers in env memory, and fixed some formatting
ghutchis 5293d 04h /tv80/
97 Added data in mux, added 16450 UART to environment ghutchis 5297d 08h /tv80/
96 Added Z80 op decode to environment, enabled by -k switch ghutchis 5297d 13h /tv80/
95 Updated regression script to use SystemC simulation ghutchis 5299d 09h /tv80/
94 Ported over env_io.v from Verilog environment to tv_responder.
Basic tests from Verilog environment (hello, fib) now passing in
SystemC environment.
ghutchis 5301d 09h /tv80/
93 Added common header file for all systemc environment ghutchis 5302d 08h /tv80/
92 Added responder to top level, beginning of support for ihex load ghutchis 5306d 09h /tv80/
91 Preliminary support for SystemC/Verilator environment ghutchis 5306d 12h /tv80/
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5306d 12h /tv80/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.