OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [scripts/] - Rev 108

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
97 Added data in mux, added 16450 UART to environment ghutchis 5292d 12h /tv80/trunk/scripts/
95 Updated regression script to use SystemC simulation ghutchis 5294d 13h /tv80/trunk/scripts/
91 Preliminary support for SystemC/Verilator environment ghutchis 5301d 16h /tv80/trunk/scripts/
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.
ghutchis 5301d 16h /tv80/trunk/scripts/
89 RTL and environment fixes for nmi bug ghutchis 5321d 19h /tv80/trunk/scripts/
84 New directory structure. root 5562d 05h /tv80/trunk/scripts/
67 Updated register generator based on testing with simple_gmii. Changed
how interrupt output mux is created, fixed many bugs.
ghutchis 7030d 16h /trunk/scripts/
64 Created rgen script and expanded available register types ghutchis 7031d 15h /trunk/scripts/
63 Added simple regression script. -r command runs all tests (serially),
-c command checks results after all tests have completed.
ghutchis 7065d 20h /trunk/scripts/
59 Added lib for generating MPU interfaces ghutchis 7065d 20h /trunk/scripts/
44 Updated run script for better dump control ghutchis 7122d 20h /trunk/scripts/
38 Added command-line options for help (-h) and run with instruction decode (-d) ghutchis 7149d 06h /trunk/scripts/
5 Added license info headers to all files. Added run2, which splits file
output into a ROM region and a RAM region.
ghutchis 7246d 22h /trunk/scripts/
2 Initial commit ghutchis 7320d 21h /trunk/scripts/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.