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[/] [uart16550/] [tags/] [rel_2/] - Rev 70

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Rev Log message Author Age Path
70 tf_pop was too wide. Now it is only 1 clk cycle width. mohor 8181d 16h /uart16550/tags/rel_2/
69 More than one character was stored in case of break. End of the break
was not detected correctly.		 mohor 8190d 07h /uart16550/tags/rel_2/
68 lsr[7] was not showing overrun errors. mohor 8193d 14h /uart16550/tags/rel_2/
67 Missing declaration of rf_push_q fixed. mohor 8200d 14h /uart16550/tags/rel_2/
66 rx push changed to be only one cycle wide. mohor 8200d 14h /uart16550/tags/rel_2/
65 Warnings fixed (unused signals removed). mohor 8201d 19h /uart16550/tags/rel_2/
64 Warnings cleared. mohor 8201d 20h /uart16550/tags/rel_2/
63 Synplicity was having troubles with the comment. mohor 8201d 20h /uart16550/tags/rel_2/
62 Bug that was entered in the last update fixed (rx state machine). mohor 8202d 19h /uart16550/tags/rel_2/
61 overrun signal was moved to separate block because many sequential lsr
reads were preventing data from being written to rx fifo.
underrun signal was not used and was removed from the project.		 mohor 8203d 13h /uart16550/tags/rel_2/
60 Things related to msr register changed. After THRE IRQ occurs, and one
character is written to the transmit fifo, the detection of the THRE bit in the
LSR is delayed for one character time.		 mohor 8203d 18h /uart16550/tags/rel_2/
59 MSR register fixed. mohor 8206d 14h /uart16550/tags/rel_2/
58 After reset modem status register MSR should be reset. mohor 8206d 18h /uart16550/tags/rel_2/
57 timeout irq must be set regardless of the rda irq (rda irq does not reset the
timeout counter).		 mohor 8207d 17h /uart16550/tags/rel_2/
56 thre irq should be cleared only when being source of interrupt. mohor 8207d 18h /uart16550/tags/rel_2/
55 some synthesis bugs fixed gorban 8208d 05h /uart16550/tags/rel_2/
54 LSR status bit 0 was not cleared correctly in case of reseting the FCR (rx fifo). mohor 8208d 19h /uart16550/tags/rel_2/
53 Scratch register define added. mohor 8209d 19h /uart16550/tags/rel_2/
52 Scratch register added gorban 8210d 08h /uart16550/tags/rel_2/
51 Igor fixed break condition bugs gorban 8210d 08h /uart16550/tags/rel_2/

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