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[/] [uart16550/] [tags/] [rel_3/] [doc/] [src/] - Rev 106

Rev	Log message	Author	Age	Path
106	New directory structure.	root	5572d 19h	/uart16550/tags/rel_3/doc/src/
102	This commit was manufactured by cvs2svn to create tag 'rel_3'.		7326d 17h	/uart16550/tags/rel_3/doc/src/
92	This is revision 1.4, revision 1.5 was put there by mistake.	simons	7495d 18h	/uart16550/tags/rel_3/doc/src/
90	Add Flextronics header	avisha	7498d 16h	/uart16550/tags/rel_3/doc/src/
85	Updated documentation to include latest changes.	gorban	7975d 09h	/uart16550/tags/rel_3/doc/src/
48	Updated specification documentation. Added full 32-bit data bus interface, now as default. Address is 5-bit wide in 32-bit data bus mode. Added wb_sel_i input to the core. It's used in the 32-bit mode. Added debug interface with two 32-bit read-only registers in 32-bit mode. Bits 5 and 6 of LSR are now only cleared on TX FIFO write. My small test bench is modified to work with 32-bit mode.	gorban	8226d 08h	/uart16550/tags/rel_3/doc/src/
20	typo bug fixes	gorban	8331d 10h	/uart16550/tags/rel_3/doc/src/
14		gorban	8339d 13h	/uart16550/tags/rel_3/doc/src/