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[/] [uart16550/] [tags/] [rel_3/] [rtl/] - Rev 99

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Rev Log message Author Age Path
99 Added synchronizer flops for RX input. tadejm 7317d 12h /uart16550/tags/rel_3/rtl/
98 Added to synchronize RX input to Wishbone clock. tadejm 7317d 12h /uart16550/tags/rel_3/rtl/
89 adjusted comment + define dries 7569d 17h /uart16550/tags/rel_3/rtl/
88 added clearing the receiver fifo statuses on resets gorban 7632d 06h /uart16550/tags/rel_3/rtl/
87 This fixes errors in some cases when data is being read and put to the FIFO at the same time. Patch is submitted by Scott Furman. Update is very recommended. gorban 7662d 08h /uart16550/tags/rel_3/rtl/
84 The uart_defines.v file is included again in sources. gorban 7979d 03h /uart16550/tags/rel_3/rtl/
80 Remove uart_fifo.v because it is replaced by other 2 files. gorban 7986d 01h /uart16550/tags/rel_3/rtl/
79 Bug Fixes:
* Possible loss of sync and bad reception of stop bit on slow baud rates fixed.
Problem reported by Kenny.Tung.
* Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers.

Improvements:
* Made FIFO's as general inferrable memory where possible.
So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx).
This saves about 1/3 of the Slice count and reduces P&R and synthesis times.

* Added optional baudrate output (baud_o).
This is identical to BAUDOUT* signal on 16550 chip.
It outputs 16xbit_clock_rate - the divided clock.
It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.		 gorban 7986d 01h /uart16550/tags/rel_3/rtl/
75 Endian define added. Big Byte Endian is selected by default. mohor 8139d 07h /uart16550/tags/rel_3/rtl/
74 tf_overrun signal was disabled since it was not used gorban 8144d 09h /uart16550/tags/rel_3/rtl/
73 major bug in 32-bit mode that prevented register access fixed. gorban 8151d 08h /uart16550/tags/rel_3/rtl/
71 Removed confusing comment gorban 8176d 04h /uart16550/tags/rel_3/rtl/
70 tf_pop was too wide. Now it is only 1 clk cycle width. mohor 8181d 13h /uart16550/tags/rel_3/rtl/
69 More than one character was stored in case of break. End of the break
was not detected correctly.		 mohor 8190d 03h /uart16550/tags/rel_3/rtl/
68 lsr[7] was not showing overrun errors. mohor 8193d 11h /uart16550/tags/rel_3/rtl/
67 Missing declaration of rf_push_q fixed. mohor 8200d 11h /uart16550/tags/rel_3/rtl/
66 rx push changed to be only one cycle wide. mohor 8200d 11h /uart16550/tags/rel_3/rtl/
65 Warnings fixed (unused signals removed). mohor 8201d 15h /uart16550/tags/rel_3/rtl/
64 Warnings cleared. mohor 8201d 16h /uart16550/tags/rel_3/rtl/
63 Synplicity was having troubles with the comment. mohor 8201d 17h /uart16550/tags/rel_3/rtl/

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