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[/] [uart16550/] [tags/] [rel_4/] - Rev 82

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Rev Log message Author Age Path
82 Updated to work with latest core. gorban 7995d 23h /uart16550/tags/rel_4/
81 Added lastest additions. gorban 7996d 00h /uart16550/tags/rel_4/
80 Remove uart_fifo.v because it is replaced by other 2 files. gorban 7996d 00h /uart16550/tags/rel_4/
79 Bug Fixes:
* Possible loss of sync and bad reception of stop bit on slow baud rates fixed.
Problem reported by Kenny.Tung.
* Bad (or lack of ) loopback handling fixed. Reported by Cherry Withers.

Improvements:
* Made FIFO's as general inferrable memory where possible.
So on FPGA they should be inferred as RAM (Distributed RAM on Xilinx).
This saves about 1/3 of the Slice count and reduces P&R and synthesis times.

* Added optional baudrate output (baud_o).
This is identical to BAUDOUT* signal on 16550 chip.
It outputs 16xbit_clock_rate - the divided clock.
It's disabled by default. Define UART_HAS_BAUDRATE_OUTPUT to use.		 gorban 7996d 00h /uart16550/tags/rel_4/
75 Endian define added. Big Byte Endian is selected by default. mohor 8149d 06h /uart16550/tags/rel_4/
74 tf_overrun signal was disabled since it was not used gorban 8154d 07h /uart16550/tags/rel_4/
73 major bug in 32-bit mode that prevented register access fixed. gorban 8161d 06h /uart16550/tags/rel_4/
72 UART PHY added. Files are fully operational, working on HW. mohor 8174d 14h /uart16550/tags/rel_4/
71 Removed confusing comment gorban 8186d 03h /uart16550/tags/rel_4/
70 tf_pop was too wide. Now it is only 1 clk cycle width. mohor 8191d 11h /uart16550/tags/rel_4/
69 More than one character was stored in case of break. End of the break
was not detected correctly.		 mohor 8200d 02h /uart16550/tags/rel_4/
68 lsr[7] was not showing overrun errors. mohor 8203d 09h /uart16550/tags/rel_4/
67 Missing declaration of rf_push_q fixed. mohor 8210d 09h /uart16550/tags/rel_4/
66 rx push changed to be only one cycle wide. mohor 8210d 09h /uart16550/tags/rel_4/
65 Warnings fixed (unused signals removed). mohor 8211d 14h /uart16550/tags/rel_4/
64 Warnings cleared. mohor 8211d 15h /uart16550/tags/rel_4/
63 Synplicity was having troubles with the comment. mohor 8211d 15h /uart16550/tags/rel_4/
62 Bug that was entered in the last update fixed (rx state machine). mohor 8212d 14h /uart16550/tags/rel_4/
61 overrun signal was moved to separate block because many sequential lsr
reads were preventing data from being written to rx fifo.
underrun signal was not used and was removed from the project.		 mohor 8213d 08h /uart16550/tags/rel_4/
60 Things related to msr register changed. After THRE IRQ occurs, and one
character is written to the transmit fifo, the detection of the THRE bit in the
LSR is delayed for one character time.		 mohor 8213d 13h /uart16550/tags/rel_4/

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