URL https://opencores.org/ocsvn/uart2bus/uart2bus/trunk

Subversion Repositories uart2bus

[/] [uart2bus/] [trunk/] - Rev 5

Rev	Log message	Author	Age	Path
5	Add structure for VHDL (verilog similar tree).	smuller	5086d 21h	/uart2bus/trunk/
4	Corrected some problems in the binary mode protocol test bench. Updated documentation.	motilito	5181d 19h	/uart2bus/trunk/
3		motilito	5228d 01h	/uart2bus/trunk/
2	Uploaded the initial project version.	motilito	5228d 03h	/uart2bus/trunk/
1	The project and the structure was created	root	5230d 20h	/uart2bus/trunk/