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URL https://opencores.org/ocsvn/virtex7_pcie_dma/virtex7_pcie_dma/trunk

Subversion Repositories virtex7_pcie_dma

[/] [virtex7_pcie_dma/] [trunk/] - Rev 33

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Rev Log message Author Age Path
33 ADDED:
-- supportedtools.tex, again to test the OC repo		 aborga 2948d 17h /virtex7_pcie_dma/trunk/
32 MODIFIED:
-- minor things just to test OC svn repo		 aborga 2948d 17h /virtex7_pcie_dma/trunk/
31 Added example application documentation. oussamak 3042d 18h /virtex7_pcie_dma/trunk/
30 Added:
* Wupper GUI with speed test and chain test
* Added wupper-dma-transfer, wupper-chaintest and wupper-write
* Several bug fixes in the Wupper tools		 oussamak 3042d 19h /virtex7_pcie_dma/trunk/
29 Improved application to reflect both up and down transfers fransschreuder 3084d 17h /virtex7_pcie_dma/trunk/
28 Added registermap reset fransschreuder 3084d 19h /virtex7_pcie_dma/trunk/
27 Fixed:
* BUG 2580: Missing packets in receive (PC => FPGA) path

Changed:
* Client tags now handled by Xilinx IP core
* fifo signals to reflect upfifo and downfifo naming		 fransschreuder 3084d 22h /virtex7_pcie_dma/trunk/
26 Added sys_clk constraint fransschreuder 3085d 00h /virtex7_pcie_dma/trunk/
25 Added scripts and constraints for KCU105 fransschreuder 3085d 00h /virtex7_pcie_dma/trunk/
24 Added:
* Support for KCU105 board in code
TODO
* Add constraints and build scripts for KCU105		 fransschreuder 3085d 18h /virtex7_pcie_dma/trunk/
23 Fixed reset of application registers fransschreuder 3142d 23h /virtex7_pcie_dma/trunk/
22 Added dma_soft_reset to trigger register resets fransschreuder 3148d 23h /virtex7_pcie_dma/trunk/
21 Fixed BUG http://opencores.org/bug,view,2562 fransschreuder 3157d 20h /virtex7_pcie_dma/trunk/
20 Fixed:
* Missing packets if the fifo goes empty during a TLP
* Dynamically change the empty threshold of the main fifo to TLP size		 fransschreuder 3171d 19h /virtex7_pcie_dma/trunk/
19 * driver/README updated oussamak 3177d 21h /virtex7_pcie_dma/trunk/
18 Changed:
* Added drivers
* Added Wupper tools for debugging
* Added card ID register		 oussamak 3177d 23h /virtex7_pcie_dma/trunk/
17 Changed name of toplevel, to make tree consistent oussamak 3192d 01h /virtex7_pcie_dma/trunk/
16 MODIFED:
-- top level name to wupper_oc (including scripts)		 aborga 3241d 19h /virtex7_pcie_dma/trunk/
15 MODIFIED:
-- Renamed core to Wupper (vhdl files)
-- Changed width of interrupt enable to number_of_interrupts		 fransschreuder 3241d 19h /virtex7_pcie_dma/trunk/
14 RENAMED:
-- simulation folder		 aborga 3241d 21h /virtex7_pcie_dma/trunk/

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