URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] - Rev 25

Rev	Log message	Author	Age	Path
25	Timing improvements, reduced FIFO size from 1024 to 512	antanguay	4215d 23h	/xge_mac/
24	Use FIFO's for statistics clock domain crossing	antanguay	4216d 01h	/xge_mac/
23	Adding basic packet stats	antanguay	4216d 07h	/xge_mac/
22	Added prototype system verilog testbench	antanguay	4218d 03h	/xge_mac/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4218d 04h	/xge_mac/
20	Updates for Xilinx synthesis	antanguay	4507d 22h	/xge_mac/
19	Updates for 32/64 bit systems	antanguay	4682d 23h	/xge_mac/
18	Updates for linux 32-bit	antanguay	4683d 20h	/xge_mac/
17	Fixed deprecated SystemC warnings	antanguay	4686d 04h	/xge_mac/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4686d 10h	/xge_mac/
15	Updated for Verilator 3.813	antanguay	4705d 10h	/xge_mac/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5294d 05h	/xge_mac/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5294d 06h	/xge_mac/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5294d 06h	/xge_mac/
11	Fixed clock crossing	antanguay	5400d 03h	/xge_mac/
10	Added details to spec	antanguay	5497d 22h	/xge_mac/
9	Added old uploaded documents to new repository.	root	5572d 10h	/xge_mac/
8	Added old uploaded documents to new repository.	root	5572d 15h	/xge_mac/
7	New directory structure.	root	5572d 15h	/xge_mac/