URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] - Rev 86

Rev	Log message	Author	Age	Path
86	initial input	simont	7809d 09h	/
85	prepare bugs	simont	7809d 09h	/
84	remove wb_bus_mon	simont	7817d 08h	/
83	replace some modules	simont	7817d 08h	/
82	replace some modules	simont	7817d 08h	/
81	initial import	simont	7817d 08h	/
80	removing unused modules	simont	7817d 08h	/
79	initial import	simont	7817d 09h	/
78	alu with registered outputs	simont	7877d 08h	/
77	substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel	simont	7886d 05h	/
76	add module oc8051_sfr, 256 bytes internal ram	simont	7886d 05h	/
75	initial import	simont	7886d 05h	/
74	add module oc8051_wb_iinterface	simont	7894d 06h	/
73	initial import	simont	7894d 06h	/
72	fix bug in interface to external data ram	simont	7894d 08h	/
71	add cache	simont	7898d 07h	/
70	initial import	simont	7898d 07h	/
69	add parameters	simont	7898d 09h	/
68	add instruction cache and DELAY parameters for external ram, rom	simont	7898d 09h	/
67	add parameters for instruction cache	simont	7898d 09h	/