URL https://opencores.org/ocsvn/async_sdm_noc/async_sdm_noc/trunk

Subversion Repositories async_sdm_noc

[/] - Rev 79

Rev	Log message	Author	Age	Path
79	update comments in sim compile.sh to clarify that synthesis must be done before post-synthesis simulation	wsong0210	4534d 02h	/
78	pass link	wsong0210	4700d 13h	/
77	pass syn elaboration	wsong0210	4701d 13h	/
76	fix syntex	wsong0210	4705d 13h	/
75	code finished, start the debugging	wsong0210	4705d 13h	/
74	in/out buffer finished	wsong0210	4706d 13h	/
73	input buffer	wsong0210	4713d 13h	/
72	clos-opt ongoing, Clos switch finished, nxt input buffer	wsong0210	4714d 13h	/
71	the buffered 2-stage Clos switch	wsong0210	4715d 13h	/
70	clos-opt ongoing	wsong0210	4715d 13h	/
69	central module of the Clos	wsong0210	4718d 13h	/
68	rewite the clos switch in the SDM-Clos-buf router	wsong0210	4719d 13h	/
67	structure not good, prepare to use new files	wsong0210	4719d 14h	/
66	clos opt ongoing	wsong0210	4734d 07h	/
65	pipeline controller	wsong0210	4734d 08h	/
64	clos opt ongoing	wsong0210	4734d 08h	/
63	clos opt ongoing	wsong0210	4734d 12h	/
62	clos opt ongoing	wsong0210	4735d 13h	/
61	settle down the pipeline controller	wsong0210	4740d 13h	/
60	try to make the address comparison relaxed QDI	wsong0210	4743d 14h	/