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62 This commit was manufactured by cvs2svn to create tag 'rel_5'. 7624d 23h /
61 Lapsus fixed. simons 7624d 23h /
60 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7624d 23h /
59 Reset value for riscsel register set to 1. simons 7624d 23h /
58 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7625d 01h /
57 Multiple cpu support added. simons 7625d 01h /
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7891d 21h /
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7891d 21h /
54 This commit was manufactured by cvs2svn to create tag 'rel_2'. 7891d 23h /
53 Trst active high. Inverted on higher layer. mohor 7891d 23h /
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7891d 23h /
51 WISHBONE Scan Chain is changed to reflect state of the WISHBONE access (WBInProgress bit added). Internal counter is used (counts 256 wb_clk cycles) and when counter exceeds that value, wb_cyc_o is negated. mohor 7919d 10h /
50 Revision 1.5 of the document ready. WISHBONE Scan Chain changed. mohor 7919d 11h /
49 This commit was manufactured by cvs2svn to create tag 'sdram_test_working'. 8074d 22h /
48 This commit was manufactured by cvs2svn to create tag 'rel_1'. 8074d 22h /
47 mon_cntl_o signals that controls monitor mux added. mohor 8074d 22h /
46 Asynchronous reset used instead of synchronous. mohor 8083d 04h /
45 tdo_padoen_o changed to tdo_padoe_o. Signal is active high. mohor 8090d 00h /
44 Signal names changed to lower case. mohor 8090d 00h /
43 Intentional error removed. mohor 8095d 00h /

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