URL https://opencores.org/ocsvn/pcie_ds_dma/pcie_ds_dma/trunk

Subversion Repositories pcie_ds_dma

[/] - Rev 32

Rev	Log message	Author	Age	Path
32	Set 125 MHz for wishbone bus. Data transfered from TEST_GEN to computer without errors.	dsmv	3996d 11h	/
31	correct wb_test	dsmv	3996d 12h	/
30	data read from wb_gen with error	dsmv	4003d 15h	/
29	Correct dmar, rst for wb_test; Add STATUS register.	dsmv	4003d 15h	/
28	add test_dio.cfg out_dio.cfg	dsmv	4015d 10h	/
27	update adm_test	dsmv	4015d 10h	/
26	update for adm_test	dsmv	4015d 10h	/
25	update test_main.cfg	dsmv	4033d 13h	/
24	update test_main.cfg	dsmv	4033d 13h	/
23	Correct default settings value.	v.karak	4033d 19h	/
22	correct wishbone_test_en.htm	dsmv	4045d 16h	/
21	debug ambpex5_sx50t_wishbone	dsmv	4045d 16h	/
20	debug wb_test	dsmv	4045d 17h	/
19		dsmv	4045d 17h	/
18	read block_id - ok	dsmv	4046d 10h	/
17	ambpex5_sx50t_wishbone - simulation is ok	dsmv	4067d 12h	/
16	ambpex5_sx50t_wishbone - add files, don't work	dsmv	4068d 10h	/
15	Add ambpex5_sx50t_wishbone\src	dsmv	4068d 12h	/
14	Add project ambpex5_sx50t_wishbone	dsmv	4068d 12h	/
13	correct wishbone_test_en.htm	dsmv	4073d 14h	/