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Rev Log message Author Age Path
38 root 5568d 18h /
37 Some minor fixes. Now we are trying to make it synthesizable. gabrieloshiro 5569d 15h /
36 All module names are written using uppercase letters now. gabrieloshiro 5569d 16h /
35 Several wires created to help code readibility. creep 5569d 16h /
34 Fixed state names. creep 5569d 18h /
33 Some portion of the absolute indexed mode is done, yet is fully nonfunctional. creep 5569d 18h /
32 Documentation is wrong. I`ve just kept the standard. Some ALU operations are not working 100%. Most of them don`t affect Processor Status Register yet. However the main body will be like this. :D gabrieloshiro 5569d 18h /
31 Added zero page indexed mode. creep 5569d 19h /
30 Added zero page mode. creep 5569d 19h /
29 Absolute addressing mode should be working. creep 5569d 20h /
28 More documentation. gabrieloshiro 5569d 21h /
27 Added the pipelining support for a few addressing modes. Still working on absolute addressing mode. creep 5569d 21h /
26 I`m still finishing the documentation. But the file should work by now. gabrieloshiro 5572d 15h /
25 Package file contains all important constants and local parameters. It assigns constant values for opcodes aliases, processor status register indexes, and addressing modes. It is going to help people to understand the code. T65 project has a lot of constants inside its codes. So it is hard to understand it. gabrieloshiro 5572d 16h /
24 Added some simple logic to a few states. Connection with the ALU is pending. creep 5572d 17h /
23 Updated file header standard. creep 5572d 18h /
22 Signal and module name convention. creep 5572d 18h /
21 *** empty log message *** creep 5572d 18h /
20 Added immediate, absolute and zero page addressing modes FSM branches. Five other modes still needed. Internal signal handling and temp registers still missing. creep 5572d 19h /
19 Parameters removed. creep 5572d 20h /

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