URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 42

Rev	Log message	Author	Age	Path
42	Fixed bus req/ack cycle	jesus	7869d 13h	/
41	Removed UNISIM library	jesus	7869d 13h	/
40	Cleanup	jesus	7869d 13h	/
39	Added -n option and component declaration	jesus	7897d 10h	/
38	Added Leonardo .ucf generation	jesus	7897d 10h	/
37	Changed to single register file	jesus	7897d 13h	/
36	Added component declaration	jesus	7897d 13h	/
35	Release 0242	jesus	7904d 01h	/
34	Updated for ISE 5.1	jesus	7904d 06h	/
33	Fixed typo	jesus	7913d 22h	/
32	Fixed for ISE 5.1	jesus	7913d 22h	/
31	Fixed generic name error	jesus	7917d 00h	/
30	Changed to xilinx specific RAM	jesus	7923d 00h	/
29	Fixed (IX/IY+d) timing and added all GB op-codes	jesus	7923d 00h	/
28	Adapted for zxgate	jesus	7924d 00h	/
27	Xilinx SSRAM, initial release	jesus	7924d 00h	/
26	Fixed instruction timing for POP and DJNZ	jesus	7937d 16h	/
25	IX/IY timing and ADC/SBC fix	jesus	7939d 02h	/
24	no message	jesus	7944d 22h	/
23	Fixed T2Write	jesus	7944d 22h	/