URL https://opencores.org/ocsvn/w11/w11/trunk

Subversion Repositories w11

[/] [w11/] [tags/] [w11a_V0.6/] [rtl/] [w11a/] [pdp11_sequencer.vhd] - Rev 24

Rev	Log message	Author	Age	Path
24	- major release w11a_V0.60 (tagged)	wfjm	3652d 06h	/w11/tags/w11a_V0.6/rtl/w11a/pdp11_sequencer.vhd
22	- interim release w11a_V0.581 (untagged) - new reference system - switched from ISE 13.3 to 14.7. - map/par behaviour changed, unfortunately unfavorably for w11a. On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can be achieved now. - new man pages (in doc/man/man1/) - support for Spartan-6 CMTs in PLL and DCM mode	wfjm	3660d 07h	/w11/tags/w11a_V0.6/rtl/w11a/pdp11_sequencer.vhd
13	- interim release w11a_V0.532 (untagged) - re-organize modules 'human I/O' interface on Digilent boards - add test designs for 'human I/O' interface for atlys,nexys2, and s3board - small updates in crc8 and dcm areas - with one exception all vhdl sources use now numeric_std	wfjm	4581d 16h	/w11/tags/w11a_V0.6/rtl/w11a/pdp11_sequencer.vhd
8	- interim release w11a_V0.51 (untagged) - migrate to ibus protocol verion 2 - nexys2 systems now with DCM derived system clock supported - sys_w11a_n2 now runs with 58 MHz clksys	wfjm	4939d 05h	/w11/tags/w11a_V0.6/rtl/w11a/pdp11_sequencer.vhd
2	initial source upload (no docs yet)	wfjm	5080d 10h	/w11/tags/w11a_V0.6/rtl/w11a/pdp11_sequencer.vhd