URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_divide.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5477d 17h	/8051/trunk/rtl/verilog/oc8051_divide.v
185		root	5533d 18h	/8051/trunk/rtl/verilog/oc8051_divide.v
95	updating...	simont	7702d 21h	/8051/trunk/rtl/verilog/oc8051_divide.v
45	prepared header	simont	7886d 15h	/8051/trunk/rtl/verilog/oc8051_divide.v
29	fix some bugs	simont	7924d 21h	/8051/trunk/rtl/verilog/oc8051_divide.v
26	main divider logic was optimized not optimized by compiler, so I did it by hand	markom	7924d 23h	/8051/trunk/rtl/verilog/oc8051_divide.v
25	divider and multiplier pass test	markom	7925d 18h	/8051/trunk/rtl/verilog/oc8051_divide.v
20	multiplier and divider changed so they complete in 4 cycles	markom	7926d 20h	/8051/trunk/rtl/verilog/oc8051_divide.v
5	more linter corrections; 2 tests still fail	markom	7933d 19h	/8051/trunk/rtl/verilog/oc8051_divide.v
4	Code repaired to satisfy the linter; testbech fails	markom	7933d 21h	/8051/trunk/rtl/verilog/oc8051_divide.v
2	Initial CVS import	simont	7949d 19h	/8051/trunk/rtl/verilog/oc8051_divide.v