URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_dptr.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5478d 00h	/8051/trunk/rtl/verilog/oc8051_dptr.v
185		root	5534d 01h	/8051/trunk/rtl/verilog/oc8051_dptr.v
118	change wr_sft to 2 bit wire.	simont	7695d 22h	/8051/trunk/rtl/verilog/oc8051_dptr.v
82	replace some modules	simont	7782d 01h	/8051/trunk/rtl/verilog/oc8051_dptr.v
46	prepared header	simont	7886d 21h	/8051/trunk/rtl/verilog/oc8051_dptr.v
2	Initial CVS import	simont	7950d 01h	/8051/trunk/rtl/verilog/oc8051_dptr.v