OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_indi_addr.v] - Rev 186

Rev

Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
186 root 5477d 19h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
185 root 5533d 20h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
179 add /* synopsys xx_case */ to case statments. simont 7612d 14h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
139 add aditional alu destination to solve critical path. simont 7669d 19h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
82 replace some modules simont 7781d 20h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
46 prepared header simont 7886d 17h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
5 more linter corrections; 2 tests still fail markom 7933d 22h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
4 Code repaired to satisfy the linter; testbech fails markom 7933d 23h /8051/trunk/rtl/verilog/oc8051_indi_addr.v
2 Initial CVS import simont 7949d 21h /8051/trunk/rtl/verilog/oc8051_indi_addr.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.