URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [trunk/] [rtl/] [verilog/] [oc8051_int.v] - Rev 186

Rev	Log message	Author	Age	Path
186		root	5478d 04h	/8051/trunk/rtl/verilog/oc8051_int.v
185		root	5534d 05h	/8051/trunk/rtl/verilog/oc8051_int.v
179	add /* synopsys xx_case */ to case statments.	simont	7612d 22h	/8051/trunk/rtl/verilog/oc8051_int.v
150	fix some bugs.	simont	7641d 02h	/8051/trunk/rtl/verilog/oc8051_int.v
116	change sfr's interface.	simont	7698d 04h	/8051/trunk/rtl/verilog/oc8051_int.v
90	change module name.	simont	7708d 01h	/8051/trunk/rtl/verilog/oc8051_int.v
82	replace some modules	simont	7782d 05h	/8051/trunk/rtl/verilog/oc8051_int.v
46	prepared header	simont	7887d 02h	/8051/trunk/rtl/verilog/oc8051_int.v
22	fix some bugs	simont	7927d 00h	/8051/trunk/rtl/verilog/oc8051_int.v
17	fix some bugs	simont	7931d 05h	/8051/trunk/rtl/verilog/oc8051_int.v
4	Code repaired to satisfy the linter; testbech fails	markom	7934d 08h	/8051/trunk/rtl/verilog/oc8051_int.v
2	Initial CVS import	simont	7950d 06h	/8051/trunk/rtl/verilog/oc8051_int.v