OpenCores
URL https://opencores.org/ocsvn/apbi2c/apbi2c/trunk

Subversion Repositories apbi2c

[/] - Rev 25

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
25 removing unnecessary file. redbear 3641d 12h /
24 Correcetd modules and back again toold plan on fifo using only registers. redbear 3641d 12h /
23 correcting TX FSM redbear 3655d 18h /
22 Correcting TX transmission and remove tri state from RTL. redbear 3656d 12h /
21 added tri state on module i2c redbear 3669d 16h /
20 Finished a previous version from RX and added SDA and SCL enable to PADS. redbear 3670d 11h /
19 changes about area use for proprely use. redbear 3715d 10h /
18 Corrected fifo mem acess, i2c_module and revised conections on top redbear 3732d 11h /
17 fifo.v and dual_port_ram.v celaya.dario 3733d 11h /
16 fifo.v and dual_port_ram.v celaya.dario 3733d 11h /
15 11'd1 to 4'd1 redbear 3739d 17h /
14 added a and to make real full fifo. redbear 3739d 17h /
13 re write all fifo module to write and give full when the same is not full redbear 3739d 17h /
12 added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH redbear 3739d 17h /
11 Added configuration to define RX and TX operation and configure propely the ports. redbear 3746d 14h /
10 Correcting a few words wrote wrong. redbear 3746d 14h /
9 More description added on spec redbear 3747d 15h /
8 More description added on spec redbear 3747d 15h /
7 Corrected CLOCK generated by SCL according NXP spec. redbear 3748d 16h /
6 Adding a basic FSM to RX. redbear 3753d 17h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.